[而댄�⑦�곌났���] ��쇰━���濡� CSA (Carry Select Adder) Design and Simulation

CSA (Carry Select Adder) Design and Simulation


Contents 2

1. Carry-Save Number Representation 3
2. An Outline of Adder 3
2.1 Ripple Carry Adder 3
2.2 CLA (Carry Look Ahead Adder) 4
2.3 CSA (Carry Select Adder) 5

3. An Outline of CSA 6
4. A Specific Logic Design 7
4.1 Full Adder of 1 bit 7
4.2 Ripple Carry Adder of 4-bits 7
4.3 Multiplexer 8
4.4 Put Together and Merge 8

5. A Design and Simulation of CSA with MAX+plus II 8
5.1 Full Adder of 1 bit 8
5.2 Ripple Carry Adder of 4-bits 9
5.3 Multiplexer 9
5.4 Simulation of CSA (Carry Select Adder) 10
6. An Analysis of CSA using MAX+plus II 11
6.1 Simulation with Wavefirn Editor 11
6.2 Timing Analyzer, Delay Matrix 13
7. VHDL with Xilinx ISE 6 Project Navigator 14

Appendix 16
1. A Figure of *.Gdf file with MAX+plus II 16
2. Rough Code with VHDL 20 ���(������)